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Synplicity Strengthens Synplify ASIC Software for High-Performance SoC Designs

With New MultiPoint Synthesis Technology, Company's Synplify ASIC Product Handles Large, IP-Intensive Semiconductors

SUNNYVALE, Calif.--(BUSINESS WIRE)--May 13, 2002-- Synplicity, Inc. (Nasdaq: SYNP - News), a leading supplier of software for the design and verification of semiconductors, today announced enhancements to its Synplify ASIC® software easing the flow for designers to achieve high quality of results for complex system-on-a-chip (SoC) designs. The Synplify ASIC software now includes Synplicity's new MultiPoint(TM) synthesis technology as well as several new features to improve quality of results (QoR) and runtime for high-performance ASIC design including case analysis and enhanced support for flows with Verplex Systems and LogicVision. The MultiPoint technology delivers a productivity-focused, scalable, memory efficient design methodology for optimizing across and within partitioned boundaries for large ASIC designs. (See press announcement titled "Synplicity details new synthesis methodology for SoC and PSoC design.")

"We believe the integration of the MultiPoint synthesis technology within our Synplify ASIC software addresses the most important challenges encountered by our customers such as incremental synthesis, full chip-level performance optimization and design team productivity," said Andy Haines, vice president of marketing for Synplicity. "We also believe our enhanced ability to quickly synthesize very large SoC designs while maintaining high quality of results gives us a strong and unique advantage over competitive approaches. With our new technology, we expect to address a broad segment of today's designs and deliver a highly scalable solution for future design challenges."

Vince Hopkin, vice president of digital ASICs at AMI Semiconductor, said, "AMIS has achieved good results with Synplicity's Synplify ASIC software and we are optimistic that the new MultiPoint technology will provide comparable results for larger designs targeted to AMIS' new 0.18 um XPressArray product."

New Synthesis Methodology for Complex Designs

With this new version of the Synplify ASIC software, customers can now employ MultiPoint synthesis technology to address large complex ASIC designs with better QoR and significantly faster runtimes than other synthesis methodologies. With the new MultiPoint technology, the Synplify ASIC software uniquely creates interface logic models (ILMs) based upon user-defined "compile points," or instructions to the synthesis tool for modeling and synthesizing a particular portion of the design. As the full design is synthesized, a new difference-based incremental synthesis capability allows parts of a design to remain unchanged while others are synthesized. This approach eliminates the need for re-synthesis that is common to time-stamp-based incremental flows by only re-synthesizing design entities that will have a different gate-level netlist due to code, property, or constraint changes.

Unlike other incremental flows where cross-boundary optimizations are difficult,the Synplify ASIC software's flow does not compromise design performance because it can optimize across design partitions. This is especially important for integrating intellectual property (IP) into a design. The Synplify ASIC software can now automatically model the IP and use the timing information for synthesis, improving delay QoR and runtime. For designs with replicated logic or IP blocks, Synplify ASIC software customers can control how each unique instance is treated in terms of boundary optimizations, without the runtime penalty of re-synthesizing each instance.

The newest release of the Synplify ASIC software also delivers traditional top-down and bottom-up flows, enabling designers the flexibility to implement the most appropriate flow to meet their design requirements.

Also new in Synplify ASIC 2.3 is the ability to perform case analysis for optimization of complex designs. Case analysis allows the user to specify constant values to be used on some signals and the rest of the design is optimized taking those constant values into consideration. This eliminates the need for slower, less integrated approaches such as using external timing analysis tools or having to set up multiple projects to cover all conditions.

Memory Efficient Software Tackles Large Designs

Synthesizing the design hierarchy all at once in a top-down design flow can help deliver the best design performance. Previous versions of the Synplify ASIC software were capable of synthesizing up to two million gates in a single top-down run, versus a few hundred thousand gates with other synthesis tools. By incorporating the MultiPoint technology into the Synplify ASIC software, Synplicity builds on the product's memory efficient architecture, dramatically improving design capacity and allowing designers to synthesize complex designs top-down with runtimes up to 15X faster than a bottom-up design flow. This memory efficiency also reduces design costs by reducing the need to invest in systems with large amounts of physical memory.

New Features Improve Interoperability

Interoperability between design tools is critical to a high-productivity design flow. In developing the Synplify ASIC 2.3 software, Synplicity worked closely with LogicVision, Inc. and Verplex Systems, Inc. to further improve interoperability between the Synplify ASIC software and the companies' embedded test and equivalency checking software. The Synplify ASIC software can automatically create assertion files for Verplex's products to ease the process of formal verification. Flow testing using the LogicVision test products has also been performed during the development of the Synplify ASIC 2.3 software.

An application note co-authored by Synplicity and Verplex is included in the Synplify ASIC product documentation.

Pricing and Availability

The Synplify ASIC software version 2.3 is available now for Linux (Red Hat 7.1), HP-UX 11.0, Sun Solaris 2.7/2.8, Windows NT 4.0 and Windows 2000 operating systems. A perpetual license of the Synplify ASIC software lists for $115,000 (U.S.). A one-year time-based license of the Synplify ASIC software lists for $69,000 (U.S.). Current customers on maintenance will be upgraded at no additional cost.

Customers interested in evaluating the software can do so with Synplicity's "Express Evaluation" toolkit, which enables a designer to complete a four-step evaluation of the software, including installation and training, within a day. The toolkit provides all of the basic information needed to conduct a hands-on evaluation of the Synplify ASIC software including an evaluation copy of the software, a design tutorial, a test case design and all of the necessary design libraries. The kit is available by contacting your local Synplicity® sales office.

About Synplicity

Synplicity, Inc. (Nasdaq: SYNP - News) is a leading provider of software products that enable the rapid and effective design and verification of semiconductors used in networking and communications, computer and peripheral, consumer and military/aerospace electronics systems. Recognizing the company's industry-leading position, Dataquest named Synplicity as the #1 provider of PLD synthesis tools in 2000 with 45 percent market share. Synplicity leverages its innovative logic synthesis, physical synthesis and verification software solutions to improve performance and shorten development time for complex programmable logic devices, application specific integrated circuits (ASICs) and system-on-chip (SoC) integrated circuits. The company's fast, easy-to-use products offer high quality of results, support industry-standard design languages (VHDL and Verilog) and run on popular platforms. As of March 31, 2002, Synplicity employed 269 people in its 20 facilities worldwide. Synplicity is headquartered in Sunnyvale, Calif. For more information on Synplicity, visit http://www.synplicity.com.

The specific features, functionality and release timing of any new technology or new versions of current products as described in this press release remain at the sole discretion of Synplicity, Inc., and Synplicity does not make any warranty as to when or if such specific features, functionality or releases may occur.

Synplicity and Synplify ASIC are registered trademarks of Synplicity, Inc. MultiPoint is a trademark of Synplicity, Inc. All other brands or products are the trademarks or registered trademarks of their respective owners.


Contact:
     Porter Novelli
     Steve Gabriel, 408/369-1500 (PR)
     steve.gabriel@porternovelli.com
        or
     Synplicity, Inc.
     John Gallagher, 408/215-6000 (Reader Contact)
     johng@synplicity.com

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